OpenROAD
Foundations and Realization of Open, Accessible Design
An open-source RTL-to-GDSII digital chip-design flow for automated placement, routing, and system-on-chip layout generation.
About the Project
Why use this?
OpenROAD provides an open tool chain for the RTL-to-GDSII phase of digital SoC design. It includes tools and scripts for floorplanning, placement, clock-tree synthesis, routing, optimization, and design completion, with a focus on reducing the cost, expertise, schedule, and risk barriers of advanced hardware implementation.
It is aimed at IC designers, hardware researchers, universities, and teams building open silicon. OpenROAD targets highly automated design with minimal human intervention, using machine intelligence and flow automation to preserve power-performance-area quality while accelerating implementation. [84]
Key Features
- RTL-to-GDSII digital implementation flow
- Floorplanning, placement, clock-tree synthesis, and routing
- Automated optimization and flow control
- Machine-learning infrastructure for design prediction and tuning
- Standalone application plus integrated OpenROAD flow scripts
- Reference / Repo
- https://github.com/The-OpenROAD-Project/OpenROAD
- Tool / Hosted
- https://openroad.readthedocs.io/en/latest/
- Replaces / Alternative to
- Cadence Innovus, Synopsys IC Compiler
- Free layer
- open-source